ECE524 FPGA/ASIC Design and Optimization Using VHDL

Department of Electrical & Computer Engineering

Fall 2026

Time: Class: M: 10:00 am – 12:45 pm, Lab: M: 1:00 pm – 3:45 pm

Location: Class: JD2203, Lab: JD1607

Fall 2026 Office Hours : M, 8:30 AM - 10:00 AM, 3:45 PM - 5:15 PM, or by appointment


Announcements

-august 24, 2026 - Class starts

-august 24, 2026 - you can download the course syllabus from here: ece524 course syllabus

-august 24, 2026 - you can download the old exams from here: ece524 old exams

-august 24, 2026 - you can download the project guideleine from here: project guideline

-august 24, 2026 - you can download the vivado tutorial from here: vivado tutorial

-august 24, 2026 - useful HDL online tutorial: (1) Nandland VHDL/Verilog ,(2) HDLBits Verilog , (3) UCR VHDL learning by example

-september 12, 2026 - you can download Xilinx Synthesis Guide (UG901) from here: xilinx synthesis guide


Assignments

Date Assignment Solution Due Date
september 2, 2026 homework 1 homework 1 solution september 21, 2026
september 21, 2026 homework 2 homework 2 solution october 5, 2026
october 5, 2026 homework 3 homework 3 solution october 19, 2026
october 19, 2026 homework 4 homework 4 solution november 2, 2026
november 2, 2026 homework 5 homework 5 solution november 30, 2026
november 30, 2026 homework 6 homework 6 solution december 7, 2026

Class Organization

Date Lecture Topic Note
august 24, 2026 lecture 1 introduction --
august 31, 2026 -- labor day holiday campus closed
september 7, 2026 lecture 2 fpga architecture part I
september 14, 2026 lecture 3 fpga architecture part II
september 21, 2026 lecture 4 synthesis --
september 28, 2026 lecture 5 synthesis --
october 5, 2026 lecture 6 advanced design practices part I
october 12, 2026 lecture 7 advanced design practices part II
october 19, 2026 lecture 8 advanced design techniques part III
october 26, 2026 lecture 9 advanced design techniques part IV
november 2, 2026 -- discussion/problem solving --
november 9, 2026 -- midterm exam --
november 16, 2026 lecture 10 FSMs --
november 23, 2026 lecture 11 timing & clocking --
november 30, 2026 lecture 12 performance improvement techniques --
december 7, 2026 -- project presentation --
december 14, 2026 lecture 14 final exam --

Lab Documents

-august 24, 2026 - you can download the Zybo 10 reference manual from here: Zybo 10 development kit reference manual

-august 24, 2026 - you can download the Zybo 20 reference manual from here: Zybo 20 development kit reference manual

-august 24, 2026 - you can download the Zedboard reference manual from here: Zedboard development kit reference manual

-august 24, 2026 - you can download the lap report guidlines from here: lab report guidlines

-august 24, 2026 - you can view Zybo information page here: Zybo information page

-august 24, 2026 - you can view Zedboard information page here: Zedboard information page

-august 24, 2026 - you can download the servo motor SG-90 datasheet from here: servo motor sg90 datasheet

-august 24, 2026 - you can download the master constraint file from here: zedboard, zybo

-august 24, 2026 - you can view SSD information page here: SSD information page


Lab Organization

Date Assignment Note supplementary material Due Date
august 27, 2026 lab 0 vivado software tutorial and demonstration lab 0 supplement september 3, 2026
september 3, 2026 lab 1 clocks and counters lab 1 supplement september 17, 2026
september 10, 2026 lab 1 -- -- september 17, 2026
september 17, 2026 lab 2 pmods (ssd) -- september 24, 2026
september 24, 2026 lab 3 fpga memory -- october 1, 2026
october 1, 2026 lab 4 fpga features lab 4 supplement october 15, 2026
october 8, 2026 lab 4 fpga features -- october 15, 2026
october 15, 2026 lab 5 FIR filter design lab 5 supplement october 29, 2026
october 15, 2026 lab 5 FIR filter design -- november 5, 2026
november 12, 2026 lab 6 FSM design -- november 26, 2026
november 19, 2026 lab 7 pwm -- december 3, 2026
november 26, 2026 lab 9 pipelining -- november 26, 2026
december 10, 2026 -- no lab -- --